Linked: GitHub – RSD: RISC-V Out-of-Order Superscalar Processor

RSD is a 32-bit RISC-V out-of-order superscalar processor core. RSD is very fast due to aggressive OoO features, while it is very compact and can be synthesized for small FPGAs.

(From: https://github.com/rsd-devel/rsd)

I’m excited about all of the innovation and ongoing development around RISC-V, especially for FPGA implementations and custom chips. The original academic paper for this one (RSD) was published in 2019, but it’s still being actively developed.